I m afraid I ll be behind for three generations! EUV equipment and EDA tools are missing, and it is difficult to deal with the 5 nanometer process.

Tech 8:32am, 1 July 2025 151

Taiwan recently listed China as a blacklist with SMIC, and the outside world is also paying close attention to the latest trends of the two companies. According to the latest TechInsights, the latest chip, Kirin X90, has been used in the MateBook Fold, but still uses SMIC's older 7-nanometer process instead of the latest 5-nanometer process.

Although China should successfully restrict exports to the United States and relied on existing DUV equipment, if its partner SMIC International cannot obtain new EUV equipment, the technical gap between China and its competitors will continue to widen. According to TechInsights, although it has been reported that the Kirin X90 uses a 5-nanometer (N+3) process, it is actually the same as the Kirin 9020, and the old 7-nanometer (N+2) process is still used.

Reported that China's only current development is upgrading from an older "N+1" architecture, bringing some minor performance and power consumption improvements, but these are far from the breakthroughs that can be brought by truly entering the 5-nanometer generation. With the 2-nanometer chip expected to be launched in the next 1 to 2 years, TechInsights pointed out that China will lag behind at least three technological generations around the world.

TechInsights pointed out that if the Huawei still stuck in a 7-nanometer SoC, it will be compared with Apple (M3 and M4 series), AMD (Ryzen 8040 series) and Qualcomm (Snapdragon X Elite series) and other competitors who are behind for several generations. With Telco, Samsung, Intel and Rapidus providing customers with 2 nanometer processes in the next 12 to 24 months, China's process technology will be at least three generations behind.

In addition to being banned from purchasing next-generation EUV equipment, Huaqian and other Chinese companies are unable to obtain the EDA (Electronic Design Automation) tools required to design chips. It is known that Hua has foreseen this problem, so it has developed a 14-nanometer EDA tool to produce 7-nanometer chips on its own.

However, turning to 5-nanometer technology is still a remote goal. Although there are reports on the market that China has started the commercialization process of 5-nanometer chips, it seems that there is no hope of official launch this year.

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